Item specifics
Description
STM32H750XBH6 Product Overview
STM32H750XBH6 is a Cortex-M7 MCU at 480 MHz with double-precision FPU, TFBGA-240+25. 128 KB Flash, 1 MB SRAM, LCD-TFT controller (up to XGA), Chrom-ART accelerator (DMA2D), Ethernet MAC, USB OTG HS/FS (HS requires external ULPI PHY), CAN FD, HW crypto (AES/CRYP/HASH/RNG), dual Quad SPI, FMC (SDRAM), three 16-bit ADCs (5 Msps, 24 ch), two 12-bit DACs, two comparators, two op-amps, advanced motor control timers, GP/LP timers, RTC, 8×USART/UART, 5×SPI/I2S, 4×I2C, SDIO, SAI, SPDIF-Rx. Up to 168 x 5 V-tolerant I/Os. 1.62–3.6 V, -40–85 °C. Compared to the H743 series, retains the full 1 MB SRAM and hardware graphics acceleration while offering a streamlined 128 KB Flash, delivering a highly cost-effective solution for pin-intensive high-end embedded graphics, real-time control, and industrial networking applications that execute code from external memory.
STM32H750XBH6 Core Features
Core: Cortex-M7 480 MHz, DPFPU + L1 cache (16 KB I-cache + 16 KB D-cache)
Memory: 128 KB Flash, 1 MB SRAM (incl. large DTCM and ITCM)
Graphics & Display: LCD-TFT controller (up to XGA), Chrom-ART accelerator (DMA2D)
Connectivity: Ethernet MAC, USB OTG HS/FS (HS needs external ULPI PHY), CAN FD, SDIO, SAI, SPDIF-Rx, 8×USART/UART, 5×SPI/I2S, 4×I2C
Security: Hardware AES/CRYP/HASH/RNG crypto coprocessor
Analog: 3×16-bit ADCs (5 Msps, 24 ch), 2×12-bit DACs, 2×Comparators, 2×Op-Amps
Motor Control: 2×Advanced Timers (PWM/Deadtime/Brake), multiple GP/LP timers
Memory Expansion: FMC (SDRAM/PSRAM/NOR/NAND), Dual Quad SPI
I/Os: 168 (5 V-tolerant)
Package: TFBGA-240+25
Temperature Range: -40°C to 85°C
STM32H750XBH6 Applications
Advanced HMI: Industrial touchscreens, graphical dashboards, smart home control panels
Real-Time Control & Networking: High-end PLCs, servo drives, industrial Ethernet gateways
Security Systems: Secure communication nodes, data encryption terminals
Multimedia Processing: Digital audio equipment, graphical display terminals
Pin-Intensive Systems: Compact high-performance devices requiring extensive I/O, graphics, and networking
STM32H750XBH6 Key Advantages
480 MHz Cortex-M7 + DPFPU: Ultimate real-time processing and floating-point performance
1 MB SRAM + Chrom-ART Acceleration: Massive buffer for smooth high-resolution display driving
Ethernet + CAN FD + HW Crypto: Single-chip for industrial networking, real-time communication, and data security
168 I/Os in Ultra-Compact TFBGA-240+25 Package: Maximum pin count in a minimal size, combining high density and high performance
Cost-Effective Graphics & Control Solution: Retains powerful H7 graphics and compute core, reduces overall cost when paired with external Flash
Dual Quad SPI + FMC: Flexible external code/data memory expansion
1.62–3.6 V Wide Supply: Adaptable to various power scenarios
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FAQ
1. Why does the STM32H750XBH6 only have 128 KB of on‑chip Flash yet is considered a high‑performance MCU?
It employs a unique “small‑Flash, large‑SRAM” architecture that focuses its cost on processing power and real‑time capability. The 128 KB Flash is intended for boot code and critical security firmware, while the generous 1 MB of SRAM ensures zero‑wait‑state data processing. The application and large assets reside in external Quad SPI Flash, which can be memory‑mapped for near on‑chip execution speed—a design that is extremely effective at balancing high performance with cost.
2. How does code execute from external Quad SPI Flash, and is performance affected?
The dual Quad SPI interfaces support 200 MHz DDR mode and memory‑mapped operation, allowing the CPU to fetch instructions directly from external Flash. Although the 128 KB on‑chip Flash can hold a bootloader, sequential read throughput over the 32‑bit AHB bus to external QSPI Flash is very high. Combined with the flexible 1 MB SRAM acting as a cache, real‑world execution efficiency closely approaches that of on‑chip Flash, fully meeting the demands of complex applications.
3. How is the 1 MB on‑chip SRAM organized, and what benefits does it bring for real‑time applications?
The 1 MB SRAM is partitioned into DTCM (Data Tightly Coupled Memory), ITCM (Instruction Tightly Coupled Memory), AXI SRAM, and multiple AHB SRAM blocks. DTCM and ITCM provide zero‑wait‑state CPU access for the most demanding real‑time interrupt response and deterministic code execution. The multi‑bank architecture also allows DMA and the CPU to access different memory regions simultaneously without blocking, greatly improving throughput for high‑speed data acquisition, DSP, and complex algorithms.
4. Does the chip include a Chrom‑ART graphics accelerator? What kind of display can it drive?
The built‑in Chrom‑ART (DMA2D) accelerator is dedicated to 2D graphics operations, efficiently handling fills, copies, blending, and pixel‑format conversion. Together with the on‑chip TFT‑LCD controller, it can directly drive a 24‑bit RGB display at resolutions up to 1024×768 and smoothly run complex user interfaces. Chrom‑ART handles graphics in the background, freeing the Cortex‑M7 core to focus on real‑time control and data processing—ideal for industrial HMIs, smart‑home panels, and instrumentation.
5. Besides QSPI, what external memory can the FMC interface support? Can it connect to SDRAM?
The Flexible Memory Controller (FMC) fully supports SDRAM, allowing direct connection of standard 16‑bit or 32‑bit SDRAM to expand runtime memory by tens or even hundreds of megabytes. FMC can also connect parallel NOR/NAND Flash. Together with the dual QSPI interfaces, the system can flexibly balance on‑chip SRAM, external SDRAM, and external non‑volatile storage to meet needs like data logging, large graphics assets, or complex network buffers.
6. Does it have a hardware crypto engine? How can firmware and communication security be ensured?
The STM32H750 does not include a dedicated CRYP hardware accelerator, but it does provide a true‑random‑number generator (TRNG), a full Memory Protection Unit (MPU), and code readout protection (RDP). If AES/SHA encryption is required, it can be efficiently implemented in software using the Cortex‑M7’s DSP instructions and optimized libraries. For applications that need hardware‑accelerated cryptography, an upgrade to a pin‑compatible model with a CRYP module is available. However, pure software encryption combined with TRNG can satisfy the security needs of many IoT and industrial communications applications.
7. What high‑speed communication interfaces does it offer? Can Ethernet, USB HS, and CAN FD be used simultaneously?
The chip integrates a 10/100M Ethernet MAC (with IEEE 1588), a USB 2.0 OTG high‑speed controller (480 Mbps), and multiple FDCAN (Flexible Data‑Rate CAN) controllers. All of these can operate independently and concurrently without conflicts. Both Ethernet MAC and USB HS feature dedicated DMA to significantly offload the CPU. This makes it well‑suited for industrial gateways, vehicle data loggers, and distributed control systems that require multi‑protocol real‑time communication.
8. What about power consumption and thermal performance? Is it suitable for compact or industrial environments?
Built on an advanced 40 nm process, the H750 typically consumes a few hundred milliwatts to around 1 W at 480 MHz full load. With the BGA package’s exposed thermal pad and proper PCB copper design, effective heat dissipation can be achieved without a fan. The chip supports dynamic frequency scaling and multiple low‑power modes to significantly reduce power during idle periods. While this specific part is rated for commercial temperature (0 °C–85 °C), good thermal design ensures stable long‑term operation within that range.
9. What software tools are needed to develop for the STM32H750, and is it compatible with previous STM32 ecosystems?
It is fully compatible with the STM32Cube ecosystem, including free tools such as STM32CubeMX and STM32CubeIDE, along with the comprehensive STM32CubeH7 firmware package. When migrating from STM32F4 or F7, a large portion of HAL code can be reused; the main adjustments involve peripheral configuration and external memory initialization. Extensive example projects are provided, covering everything from basic IO to Ethernet, USB, and graphics, enabling a fast start to development.
10. If I later need more on‑chip Flash or hardware crypto, what upgrade options are available?
If the 128 KB on‑chip Flash is insufficient or hardware‑accelerated cryptography and hashing are required, you can upgrade to the pin‑compatible STM32H753. The H753 provides up to 2 MB of on‑chip Flash and a complete CRYP hardware accelerator, while retaining the same 1 MB SRAM and all high‑performance peripherals. Because the hardware and software ecosystems are fully compatible, upgrading requires virtually no PCB design changes and the code migration is straightforward.