Item specifics
Description
STM32F722RET6 is a Cortex-M7 MCU at 216 MHz, LQFP-64. 512 KB Flash, 256 KB SRAM (64 KB DTCM, 16 KB ITCM), USB OTG HS/FS (on-chip HS PHY), Quad SPI, 2×SAI, SPDIF-Rx, SDIO, dual CAN, 3×12-bit ADCs (16 ch), 2×12-bit DACs, 17 timers (2× advanced motor control). 50 x 5 V-tolerant I/Os. 1.7–3.6 V, -40–85 °C. Higher performance than M4, with integrated USB HS PHY for real-time applications.
Core: Cortex-M7 216 MHz, FPU + L1 cache + ART Accelerator Memory: 512 KB Flash, 256 KB SRAM Connectivity: USB OTG HS/FS (on-chip HS PHY), SDIO, Quad SPI, 2×SAI, SPDIF-Rx, Dual CAN 2.0B, 4×USART, 2×UART, 5×SPI/I2S, 3×I2C Analog: 3×12-bit ADCs (16 ch), 2×12-bit DACs Timers: 17 (2× motor control PWM/deadtime, 8× GP, 2× basic, 2× WDT) I/Os: 50 (5 V-tolerant) Package: LQFP-64
Industrial control, motor drives, audio processing, IoT gateways, embedded systems needing high-speed USB and real-time processing
216 MHz Cortex-M7: Higher performance and real-time response On-chip USB HS PHY: Simplifies high-speed USB design Quad SPI + SAI + SPDIF: Fast memory expansion and multi-channel audio 512 KB Flash + 256 KB SRAM: Ample code and data space 50 I/Os in compact 64-pin package
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FAQ:
What is the STM32F722RET6 and how does it differ from the STM32F723?
The STM32F722RET6 is a 216 MHz Arm Cortex‑M7 microcontroller with 512 KB of on‑chip Flash and 336 KB of total SRAM, housed in a compact LQFP‑64 package. Unlike the STM32F723, it does not integrate a USB high‑speed PHY—you must add an external ULPI transceiver to use USB HS. This trade‑off allows the F722 to occupy a much smaller footprint while still delivering the full M7 performance and a rich set of communication peripherals.
Does the STM32F722RET6 need external memory to boot, or can it run standalone from its internal Flash?
It boots and runs entirely from its 512 KB of internal Flash. A complete RTOS, TCP/IP stack, and application code can fit comfortably within this space. The QSPI interface is available for additional storage if needed, but it is optional—unlike the XIP‑only F730, the F722 is a fully self‑contained single‑chip solution.
How is the 336 KB of SRAM organized, and what is the TCM used for?
The SRAM is split into 256 KB of general‑purpose SRAM, 16 KB of instruction TCM (ITCM), and 64 KB of data TCM (DTCM). ITCM is ideal for zero‑wait‑state execution of critical interrupt service routines and real‑time control loops. DTCM provides fast, deterministic data access for the stack and hot variables. The general‑purpose SRAM handles communication buffers and larger data structures.
Can I use USB high‑speed on the STM32F722RET6 even though there is no integrated PHY? What extra part is needed?
Yes. The chip includes a USB HS controller with ULPI interface. To enable high‑speed USB communication, you simply connect an external ULPI PHY chip (such as the Microchip USB3300 or TI TUSB1210) to the dedicated ULPI pins. The on‑chip full‑speed PHY is also available for applications that do not require HS speeds, so you can start with FS and upgrade later without changing the MCU.
How does the STM32F722RET6 compare with the STM32F407 as an upgrade? Is it pin‑compatible?
Compared to the STM32F407 (168 MHz Cortex‑M4), the F722 delivers a 216 MHz Cortex‑M7 core, nearly double the general‑purpose SRAM (256 KB vs 128 KB), and the same LQFP‑64 package with very similar pinout. Most F407 designs can be migrated with minimal PCB changes, while gaining significant processing headroom and the option to add true high‑speed USB through an external PHY.
Does the STM32F722RET6 have a display controller or Chrom‑ART accelerator?
No. The F722 has no TFT‑LCD controller, no MIPI DSI, and no graphics accelerator. It is a headless (display‑less) processor optimized for high‑performance control, communication, and DSP tasks. If you need a graphical interface, consider the STM32F746 or F750 series instead.
What communication peripherals can be active simultaneously in the LQFP‑64 package?
With careful pin assignment, you can run 10/100 Ethernet (RMII), USB full‑speed (or HS with ULPI), up to 3 UARTs, 2 SPI, and 2 I2C concurrently. The LQFP‑64 provides enough I/Os to build a fully featured industrial communication node without pin conflicts.
How can I use the ITCM and DTCM to get the best real‑time performance in a control loop?
Map your most time‑critical interrupt handlers and control‑loop code into ITCM for zero‑wait‑state execution. Place the control loop’s variables, stack, and frequently accessed data into DTCM. The 64 KB of DTCM is large enough for the entire real‑time task context, ensuring deterministic timing unaffected by bus contention from other peripherals.
Can I perform over‑the‑air (OTA) firmware updates with the 512 KB of single‑bank Flash?
Yes. Split the 512 KB Flash into a bootloader, an active application area, and a download buffer. The large on‑chip SRAM can temporarily hold the new firmware image received via Ethernet or USB. After verification, the image is written to Flash. This scheme provides a safe update mechanism without requiring dual‑bank Flash.
What are the best applications for the STM32F722RET6, and when should I choose it over an F723 or F730?
It excels in compact, headless designs that need high processing power: industrial IoT gateways, USB audio interfaces (with an external HS PHY), high‑speed motor controllers, and data loggers. Choose it over the F723 when you want the smaller LQFP‑64 footprint and are willing to add an external PHY for USB HS. Pick it over the F730 when you prefer running from internal Flash and do not want to rely on external QSPI memory for booting.