TMS320F28335PGFA Texas Instruments C2000 Series DSP Analysis: Specifications, Application Scenarios, and FAQs

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TMS320F28335PGFA is a high-performance 32-bit floating-point digital signal controller (DSC) in Texas Instruments(TI) C2000 series. It belongs to the Delfino family and is based on the TMS320C28x core, with a clock frequency of up to 150 MHz (cycle time 6.67 ns). It integrates an IEEE 754 single-precision floating-point unit (FPU), and has a broad application base in fields with extremely high real-time control precision requirements, such as motor control, digital power, and industrial automation. The chip uses a 1.9 V/1.8 V core voltage and a 3.3 V I/O voltage design, includes 256K × 16 flash memory (512 KB) and 34K × 16 SARAM, is housed in a 176-pin LQFP package (24 × 24 mm), and operates over a temperature range of -40°C to +85°C.

The core value of the TMS320F28335 lies in its floating-point computation capability. Compared with fixed-point DSPs, the hardware FPU allows developers to directly write floating-point control algorithms in C without cumbersome Q-format scaling conversions, significantly reducing development difficulty and improving code readability. Together with up to 18 PWM outputs, 6 HRPWM channels (MEP resolution 150 ps), a 16-channel 12-bit ADC, and rich communication interfaces, the chip implements the core functions required for a complete real-time control system within a single package.


Chip Specifications Parameters, Features, and Application Scenarios

Core Specifications

Part numberTMS320F28335PGFA
ManufacturerTexas Instruments
SeriesC2000™ Delfino™
CoreTMS320C28x 32-bit + IEEE 754 FPU
Maximum Clock Frequency150 MHz (6.67 ns cycle time)
Core Voltage1.9 V / 1.8 V
I/O Voltage3.3 V
Program Flash256K × 16 (512 KB)
SARAM34K × 16
OTP ROM1K × 16
Boot ROM8K × 16
PackageLQFP-176 (24 × 24 mm)
Operating Temperature-40°C to +85°C
Number of I/Os88
ADC12-bit, 16-channel, 80 ns conversion rate
PWM OutputsUp to 18
HRPWM6 channels, MEP resolution 150 ps
Communication Interfaces2 × CAN, 3 × SCI, 2 × McBSP, 1 × SPI, 1 × I2C
DMA6 channels
External InterfaceXINTF (16/32-bit), address range > 2M × 16
Security Features128-bit security key/lock
MSL LevelLevel-3-260C-168 HR

Floating-Point Computation and High-Performance CPU

The greatest differentiating advantage of the TMS320F28335 is its hardware floating-point unit (FPU). This FPU fully complies with the IEEE 754 single-precision floating-point standard and supports 16 × 16 and 32 × 32 MAC operations, as well as 16 × 16 dual MAC. This means that in scenarios requiring large amounts of floating-point computation, such as motor field-oriented control (FOC) and digital power loop compensation, the CPU can directly process floating-point data without sacrificing real-time performance. In addition, the Harvard bus architecture combined with a unified memory programming model enables efficient code execution at both the C/C++ and assembly levels. The 150 MHz clock frequency and 6.67 ns instruction cycle provide ample computational headroom for high-frequency PWM control loops.

Enhanced Control Peripherals (Core Differentiating Advantages)

The enhanced control peripherals of the TMS320F28335 are key to its position in the real-time control field:

The ePWM modules provide up to 18 PWM outputs and support functions such as dead-band generation, chopping, and fault protection, and can be flexibly configured for complementary or independent output modes. Six of these support HRPWM (high-resolution PWM), with MEP (micro edge positioner) resolution as high as 150 ps, greatly improving the adjustment accuracy of switching frequency and duty cycle and making them ideal for fine voltage regulation requirements in digital power.

The eCAP and eQEP modules are used for event capture and quadrature encoder interfaces, respectively, supporting up to 6 event capture inputs and 2 quadrature encoder interfaces, and can directly connect to incremental encoders to implement motor speed and position detection. The chip also integrates up to 8 32-bit timers (6 for eCAP, 2 for eQEP) and 9 16-bit timers (6 for ePWM, 3 for XINTCTR).

The ADC module is 12-bit, 16-channel, with an 80 ns conversion rate (i.e., up to 12.5 MSPS). It is equipped with 2 × 8-channel input multiplexers and two sample-and-hold circuits, supports single/simultaneous sampling modes, and offers selectable internal or external reference. With the 6-channel DMA controller, ADC conversion results can be automatically transferred to SARAM, reducing CPU load.

Rich Peripherals and Security Features

The chip integrates a 6-channel DMA controller that can provide data transfer services for ADC, McBSP, ePWM, XINTF, and SARAM. The XINTF external interface supports a 16-bit or 32-bit data bus, with an address range greater than 2M × 16, and can interface to external devices such as SRAM, Flash, or FPGA.

In terms of security, the TMS320F28335 provides a 128-bit security key/lock that protects Flash, OTP, and RAM blocks from unauthorized access and prevents firmware reverse engineering. The PIE (Peripheral Interrupt Expansion) module supports all 58 peripheral interrupts, and GPIO0 to GPIO63 pins can be connected to one of 8 external core interrupts, ensuring deterministic and real-time interrupt response in complex systems.

Application Scenarios

AC Motor and Permanent Magnet Synchronous Motor Control. The TMS320F28335 is extremely widely used in motor drive applications. Its floating-point FPU and ePWM modules can efficiently implement FOC (field-oriented control) and SVPWM (space vector pulse width modulation) algorithms. Related research has designed an aerospace permanent magnet motor controller based on this chip, and experiments verified its effective control of speed and torque under different operating conditions. In SVPWM control of a six-phase permanent magnet synchronous motor, the TMS320F28335 serves as the core of the main control board, enabling flexible multiphase motor drive.

Digital Power and DC-DC Converters. The chip's HRPWM outputs and fast ADC are very suitable for digital loop compensation in switching power supplies. In a variable-frequency power supply digital control system based on the TMS320F28335, designers used its on-chip hardware resources to implement irregular sampling of SPWM and a PID algorithm, producing high-quality sine wave output. In dual active bridge DC-DC converter control, the chip can perform phase-shift modulation and complete hardware mapping.

Industrial Inverters and Servo Drives. In variable-frequency speed control systems, the TMS320F28335 serves as the control core and, together with half-bridge power modules, achieves high-speed data processing and real-time control, with excellent dynamic response and steady-state performance.

Switching Power Supplies and Magnetic Bearing Power Supplies. In the design of switching power supplies for magnetic suspension bearings, the chip outputs high-precision PWM waves through floating-point computation to precisely regulate the output voltage, and is used in flyback topologies to achieve voltage conversion and grid isolation.

Power Electronics and New Energy. In scenarios such as fast control power supplies for plasma vertical displacement and photovoltaic inverters, the TMS320F28335 works with an external ADC (such as AD7656) and transmits PWM signals over optical fiber to implement digital control of H-bridge high-current fast control power supplies.

FAQs

Q1: The program runs normally in debug mode, but fails to start after stand-alone power-up. How can this be solved?

This is a typical problem frequently encountered by TMS320F28335 developers. The core cause is improper Boot mode configuration. In debug mode, the program is loaded directly into RAM through JTAG and runs, bypassing the Boot ROM boot process; however, during stand-alone power-up, the chip first executes the Boot ROM and selects the boot mode (Flash, SCI, SPI, CAN, etc.) according to GPIO pin states. If the Boot pins are configured incorrectly, the chip will attempt to boot from the wrong peripheral, causing the program to fail to start. Solution: Confirm that the level configuration of the BOOT mode selection pins (GPIO84 to GPIO87) matches the target boot mode; if booting from Flash, ensure that the program in Flash has been correctly programmed and passes verification.

Q2: The GPIO internal pull-up function is abnormal and the output level is unstable. What should be done?

This is a common problem in F28335 GPIO use. Some developers have reported that when the internal pull-up is not set, the GPIO outputs a high level, but after executing the internal pull-up configuration statement, the level immediately becomes low, and the internal pull-up seems to have no effect. Troubleshooting directions: First, check whether the GPIO multiplexing configuration is correct, ensuring that the pin has been configured for GPIO function rather than peripheral function; second, check whether the external circuit has a strong pull-down or short circuit; finally, confirm whether the GPIO group used and register operations comply with the datasheet requirements. In addition, note that the F28335 GPIO registers use a union structure. If bit-field operations are used, whole-register (all) assignment cannot be used at the same time, otherwise conflicts will occur.

Q3: GPIOs in the same group cannot simultaneously control multiple ports through the GPxDAT register. How can this be solved?

Some research has found that when using GPIOs in the same group, program instructions controlling them through the GPxDAT register cannot make two or more ports produce corresponding actions. The root cause is that read and write operations on the GPxDAT register are not atomic. Direct bit operations on the register (such as GPADAT.bit.GPIO0 = 1) may cause unexpected read-modify-write conflicts due to compiler optimization or instruction pipeline effects. Recommended solution: Use the GPxSET (set) and GPxCLR (clear) registers to independently control each port. These two registers support atomic bit set and bit clear operations, avoiding interference with whole-register reads and writes of GPxDAT.

Q4: ADC sampling shows full-screen clutter. How can this be solved from the DSP internal configuration level?

Abnormal ADC sampling waveforms are a high-frequency problem in F28335 development. Some developers have summarized that when the oscilloscope front-end signal is normal but the DSP acquisition waveform is chaotic, in most cases it is not external interference but rather a DSP internal ADC trigger timing and configuration problem. Typical causes include: when using a CPU timer to trigger the ADC, the sampling window and conversion timing do not match; incorrect ADC reference voltage configuration; ADC calibration not performed or calibration data not correctly loaded. Recommended solution: Switch to using an ePWM hardware SOC (Start of Conversion) to trigger the ADC, so that the PWM period and ADC sampling are strictly synchronized at the hardware level, fundamentally eliminating timing deviations. At the same time, ensure that registers such as ADCTRL1/ADCTRL2/ADCTRL3 are correctly configured during ADC initialization, and execute a complete self-calibration process.

Q5: In CCS3.3, float calculations produce inf or NaN. How can this be troubleshooted?

Some developers have reported that for programs compiled in the CCS3.3 environment, float-type calculations always produce inf or NaN when the input is 0, while the same code runs normally in CCS6.1.1. The root cause is differences in compiler versions and runtime libraries. The C compiler used by CCS3.3 (usually TI C2000 CGT v5.x and earlier) differs from newer compilers in its support for IEEE 754 floating-point exception handling, especially under boundary conditions such as division by zero and invalid operations. Recommended solution: Upgrade to CCS6.0 or later, together with a newer C2000 CGT compiler (v6.x and above), as these versions improve IEEE 754 compatibility for floating-point operations. If CCS3.3 must be used, explicitly add floating-point boundary-checking logic in the code.

Q6: After connecting the serial cable, power-up sometimes fails to start. How should this be handled?

This is an intermittent problem closely related to hardware design. Some developers have found that when the serial cable is connected (even if only TX, RX, and GND are connected) and then the F28335 is powered up, the program sometimes fails to start; the debug serial port must be grounded, otherwise garbled characters appear. Analysis: The connection of the serial cable may introduce an additional electrical path through the PC-side ground, affecting the F28335 reset timing or Boot pin levels. Solution: Ensure that when the serial cable is connected, the ground potential difference between the PC side and the F28335 target board is as small as possible; check whether the RC time constant of the reset circuit (XRS pin) is sufficient, and it is recommended to add an appropriate filter capacitor near the XRS pin; if the problem persists, consider adding optocoupler isolation in the serial communication path.

Q7: What alternative models are available in the same series?

The TMS320F28335 series offers multiple package and temperature-grade options. The TMS320F28335PTP uses a 176-pin HLQFP (PTP) package, with an operating temperature range extended to -40°C to +125°C, suitable for high-temperature industrial environments. In the same package (PGF 176-pin), the TMS320F28334 (128K × 16 Flash) and TMS320F28332 (64K × 16 Flash) provide lower-cost options, pin-compatible but with progressively smaller memory capacities. In addition, the TMS320F28235 (no FPU, 256K × 16 Flash) can serve as a fixed-point alternative in scenarios that do not require floating-point computation.


Conclusion

The TMS320F28335PGFA is a mature floating-point digital signal controller in TI's C2000 Delfino series. Its 150 MHz clock frequency combined with a hardware FPU gives it significant advantages in floating-point computation-intensive applications such as motor vector control and digital power loop compensation; the combination of 18 PWM outputs, 6 HRPWM channels (150 ps MEP resolution), and a 16-channel 12-bit ADC provides complete hardware support for real-time control systems; the 128-bit security key lock and PIE interrupt expansion ensure code security and deterministic interrupt response. In actual development, developers should focus on Boot mode configuration (stand-alone power-up startup problems), correct operation of GPIO registers (using SET/CLR instead of DAT bit operations), ePWM hardware trigger configuration for the ADC (to avoid sampling timing problems), and the impact of compiler versions on floating-point operations. With TI's Code Composer Studio IDE, C2000Ware software libraries, and rich digital motor control and digital power software libraries, developers can quickly build a complete solution from algorithm verification to production firmware. Although the C2000 series has evolved to newer generations such as F2837x and F28P65x, the TMS320F28335, with its mature ecosystem and stable supply, still maintains a broad application base in industrial control and power electronics.


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